Subject: [PATCH] ARM: dtsi: enable ahci sata on imx6q platforms
From: Richard Zhu <[email-masked]>

Only imx6q has the ahci sata controller, enable
it on imx6q platforms.

Signed-off-by: Richard Zhu <[email-masked]>
Signed-off-by: Shawn Guo <[email-masked]>
---
 arch/arm/boot/dts/imx6q-sabreauto.dts | 4 ++++
 arch/arm/boot/dts/imx6q-sabrelite.dts | 4 ++++
 arch/arm/boot/dts/imx6q-sabresd.dts   | 4 ++++
 arch/arm/boot/dts/imx6q.dtsi          | 9 +++++++++
 4 files changed, 21 insertions(+)

--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-sabreauto.dts
@@ -33,3 +33,7 @@
 		};
 	};
 };
+
+&sata {
+	status = "okay";
+};
--- a/arch/arm/boot/dts/imx6q-sabrelite.dts
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -65,6 +65,10 @@
 	};
 };
 
+&sata {
+	status = "okay";
+};
+
 &ecspi1 {
 	fsl,spi-num-chipselects = <1>;
 	cs-gpios = <&gpio3 19 0>;
--- a/arch/arm/boot/dts/imx6q-sabresd.dts
+++ b/arch/arm/boot/dts/imx6q-sabresd.dts
@@ -37,3 +37,7 @@
 		};
 	};
 };
+
+&sata {
+	status = "okay";
+};
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -332,6 +332,15 @@
 			};
 		};
 
+		sata: sata@02200000 {
+			compatible = "fsl,imx6q-ahci";
+			reg = <0x02200000 0x4000>;
+			interrupts = <0 39 0x04>;
+			clocks =  <&clks 154>, <&clks 187>, <&clks 105>;
+			clock-names = "sata", "sata_ref", "ahb";
+			status = "disabled";
+		};
+
 		ipu2: ipu@02800000 {
 			#crtc-cells = <1>;
 			compatible = "fsl,imx6q-ipu";